1. Technical Field of the Invention
The present invention generally relates to the field of semiconductor devices and, more particularly, to high voltage outputs drivers.
2. Description of Related Art
With the dramatic scaling of transistor dimensions, advanced CMOS technologies have seen dramatic scaling of operating voltage while their interface voltages to the outside world are changing much slower due to backward compatibility or system related constraints. That is, the breakdown voltages of leading edge transistors, such as thin gate-oxide transistors, is being reduced while many peripherals continue to utilize higher I/O supply voltages (OVDD). When interfacing between a high level OVDD peripheral and an integrated circuit, the design must protect against the integrated circuit receiving a voltage signal which is higher than the supply voltage (VDD) intended for the transistors.
Another disturbing trend is that as the number of transistors on a chip increases with each new technology, so does their leakage as well. This makes power management more necessary, but at the same time, it makes integrated analog power management design more challenging. Many current and anticipated power management solutions require direct interface to a battery.
There have been attempts to utilize thin gate-oxide transistors to interface with higher voltages, but the limitations of previously proposed solutions demand a more general and versatile solution.
The present invention achieves technical advantages as a method and apparatus using thin gate-oxide core and drain-extended transistors to interface with voltages up to six times the normal rating of the transistors. The present apparatus and system can be applied to a variety of high voltage circuit solutions, while still being capable of reliable startup. Further, a large number of power management solutions that require direct interface to a battery, for example, can exploit the benefits of the present method and apparatus for improving power efficiency and integratability into future CMOS processes.